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| (R) TDA7314 DIGITAL CONTROLLED AUDIO PROCESSOR WITH LOUDNESS 1 STEREO INPUT SELECTABLE INPUT GAIN FOR OPTIMAL ADAPTION TO DIFFERENT SOURCES INPUT AND OUTPUT FOR EXTERNAL EQUALIZER OR NOISE REDUCTION SYSTEM LOUDNESS FUNCTION VOLUME CONTROL IN 1.25dB STEPS TREBLE AND BASS CONTROL FOUR SPEAKER ATTENUATORS: - 4 INDEPENDENT SPEAKERS CONTROL IN 1.25dB STEPS FOR BALANCE AND FADER FACILITIES - INDEPENDENT MUTE FUNCTION ALL FUNCTIONS PROGRAMMABLE VIA SERIAL BUS DESCRIPTION The TDA7314 is a volume, tone (bass and treble) balance (Left/Right) and fader (front/rear) processor for quality audio applications in car radio and Hi-Fi systems. PIN CONNECTION (Top view) SDIP24 ORDERING NUMBER: TDA7314 Selectable input gain and internal loudness function are provided. Control is accomplished by serial bus microprocessor interface. The AC signal setting is obtained by resistor networks andswitches combined with operationalamplifiers. Thanks to the used BIPOLAR/CMOS Tecnology, Low Distortion, Low Noise and DC stepping are obtained. November 1999 1/12 TDA7314 TEST CIRCUIT THERMAL DATA Symbol R th j-pins Description Thermal Resistance Junction-pins Ma x. Value 65 Unit C/W ABSOLUTE MAXIMUM RATINGS Symbol VS T amb Tstg Operating Supply Voltage Operating Ambient Temperature Storage Temperature Range Parameter Value 10.2 -40 to 85 -55 to +150 Unit V C C QUICK REFERENCE DATA Symbol VS VCL THD S/N SC Supply Voltage Max. input signal handling Total Harmonic Distortion V = 1Vrms f = 1KHz Signal to Noise Ratio Channel Separation f = 1KHz Volume Control 1.25dB step 2db step 1.25dB step -78.75 -14 -38.75 0 100 Bass and Treble Control Input Gain 6.25dB step Parameter Min. 6 2 0.01 106 103 0 +14 0 18.75 0.1 Typ. 9 Max. 10 Unit V Vrms % dB dB dB dB dB dB dB Fader and Balance Control Mute Attenuation 2/12 TDA7314 BLOCK DIAGRAM 3/12 TDA7314 ELECTRICAL CHARACTERISTICS (refer to the test circuit Tamb = 25C, VS = 9V, RL = 10K, RG = 600, all controls flat (G = 0), f = 1KHz unless otherwise specified) Symbol Parameter Test Condition Min. Typ. Max. Unit SUPPLY VS IS SVR Supply Voltage Supply Current Ripple Rejection 60 6 9 8 80 10 11 V mA dB INPUT STAGE R II V CL RL GINmin GINmax GSTEP eIN VDC Input Resistance Clipping Level Output Load resistance Min. Input Gain Max. Input Gain Step Resolution Input Noise DC Steps G = 18.75dB adjacent gain steps G = 18.75 to Mute pin 7, 17 Pin 9, 11 35 2 2 -1 0 18.75 6.25 2 4 4 20 1 50 2.5 70 K Vrms K dB dB dB V mV mV VOLUME CONTROL R IV C RANGE AVMIN AVMAX ASTEP EA ET VDC Input Resistance Control Range Min. Attenuation Max. Attenuation Step Resolution Attenuation Set Error Tracking Error DC Steps adjacent attenuation steps From 0dB to Av max 0 0.5 Av = 0 to -20dB Av = -20 to -60dB 20 70 -1 70 0.5 -1.25 -3 33 75 0 75 1.25 0 50 80 1 80 1.75 1.25 2 2 3 7.5 k dB dB dB dB dB dB dB mV mV SPEAKER ATTENUATORS Crange SSTEP EA AMUTE VDC Control Range Step Resolution Attenuation set error Output Mute Attenuation DC Steps adjacent att. steps from 0 to mute 80 100 0 1 3 10 35 0.5 37.5 1.25 40 1.75 1.5 dB dB dB dB mV mV BASS CONTROL (1) Gb BSTEP RB Control Range Step Resolution Internal Feedback Resistance Max. Boost/cut +12 1 34 +14 2 44 +16 3 58 dB dB K TREBLE CONTROL (1) Gt TSTEP Control Range Step Resolution Max. Boost/cut +13 1 +14 2 +15 3 dB dB 4/12 TDA7314 ELECTRICAL CHARACTERISTICS (continued) Symbol Parameter Test Condition Min. Typ. Max. Unit AUDIO OUTPUTS VOCL RL CL ROUT VOUT Clipping Level Output Load Resistance Output Load Capacitance Output resistance DC Voltage Level 30 4.2 75 4.5 d = 0.3% 2 2 10 120 4.8 2.5 Vrms K nF V GENERAL e NO Output Noise BW = 20-20KHz, flat output muted all gains = 0dB A curve all gains = 0dB S/N d Signal to Noise Ratio Distortion all gains = 0dB; VO = 1Vrms AV = 0, VIN = 1Vrms AV = -20dB VIN = 1Vrms V IN = 0.3Vrms 80 AV = 0 to -20dB -20 to -60 dB 2.5 5 3 106 0.01 0.09 0.04 103 0 0 1 2 0.1 0.3 V V V dB % % % dB dB dB 15 Sc Channel Separation left/right Total Tracking error BUS INPUTS V IL VIH IIN VO Note: (1) Bass and Treble response see attached diagram (fig.19). The center frequency and quality of the resonance behaviour can be choosen by the external circuitry. A standard first order bass response can be realized by a standard feedback network. Input Low Voltage Input High Voltage Input Current Output Voltage SDA Acknowledge IO = 1.6mA 3 -5 1 +5 0.4 V V A V Figure 1: Loudness versus Volume Attenuation Figure 2: Loudnessversus Frequency (CLOUD = 100nF) 5/12 TDA7314 Figure 3: Loudness versus External Capacitors Figure 4: Noise vs. Volume/Gain Settings LOUDNESS VS = 9V Volume = -40dB All other control flat Cin = 2.2F C loud = 220nF, 100nF, 33nF, 10nF, Open, Shorter to Vref Figure 6: Distortion & Noise vs. Frequency Figure 5: Signal to Noise Ratio vs. Volume Setting Figure 7: Distortion & Noise vs. Frequency Figure 8: Distortion vs. Load Resistance 6/12 TDA7314 Figure 9: Channel Separation (L R) vs. Frequency Figure 10: Supply Voltage Rejection vs. Frequency Figure 11: Output Clipping Level vs. Supply Voltage Figure 12: Quiescent Current vs. Supply Voltage Figure 13: Supply Current vs. Temperature Figure 14: Bass Resistance vs. Temperature 7/12 TDA7314 Figure 15: Typical Tone Response (with the ext. components indicated in the test circuit) SOFTWARE SPECIFICATION Interface Protocol The interface protocol comprises: A start condition (S) A chip address byte, containing the TDA7314 address (the 8th bit of the byte must be 0). The TDA7314 must always acknowledge at the end of each transmitted byte. A sequence of data (N-bytes + acknowledge) A stop condition (P) TDA7314 ADDRESS MSB S 1 0 first byte 0 0 1 0 0 LSB 0 ACK MSB DATA LSB ACK MSB DATA LSB ACK P Data Transferred (N-bytes + Acknowledge) ACK = Acknowledge S = Start P = Stop MAX CLOCK SPEED 100kbits/s SOFTWARE SPECIFICATION Chip address 1 MSB 0 0 0 1 0 0 0 LSB DATA BYTES MSB 0 1 1 1 1 0 0 0 0 1 1 0 0 1 1 1 B2 0 1 0 1 0 1 1 B1 B1 B1 B1 B1 G1 0 1 B0 B0 B0 B0 B0 G0 C3 C3 A2 A2 A2 A2 A2 S2 C2 C2 A1 A1 A1 A1 A1 S1 C1 C1 LSB A0 A0 A0 A0 A0 S0 C0 C0 FUNCTION Volume control Speaker ATT LR Speaker ATT RR Speaker ATT LF Speaker ATT RF Audio switch Bass control Treble control Ax = 1.25dB steps; Bx = 10dB steps; Cx = 2dB steps; Gx = 6.25dB steps 8/12 TDA7314 SOFTWARE SPECIFICATION (continued) DATA BYTES (detailed description) Volume MSB 0 0 B2 B1 B0 A2 0 0 0 0 1 1 1 1 0 0 B2 0 0 0 0 1 1 1 1 B1 0 0 1 1 0 0 1 1 B0 0 1 0 1 0 1 0 1 A2 A1 0 0 1 1 0 0 1 1 A1 LSB A0 0 1 0 1 0 1 0 1 A0 FUNCTION Volume 1.25dB steps 0 -1.25 -2.5 -3.75 -5 -6.25 -7.5 -8.75 Volume 10dB steps 0 -10 -20 -30 -40 -50 -60 -70 For example a volume of -45dB is given by: 00100100 Speaker Attenuators MSB 1 1 1 1 0 0 1 1 0 1 0 1 B1 B1 B1 B1 B0 B0 B0 B0 A2 A2 A2 A2 0 0 0 0 1 1 1 1 0 0 1 1 1 0 1 0 1 1 1 1 1 A1 A1 A1 A1 0 0 1 1 0 0 1 1 LSB A0 A0 A0 A0 0 1 0 1 0 1 0 1 FUNCTION Speaker LF Speaker RF Speaker LR Speaker RR 0 -1.25 -2.5 -3.75 -5 -6.25 -7.5 -8.75 0 -10 -20 -30 Mute For example attenuation of 25dB on speaker RF is given by: 10110100 9/12 TDA7314 Audio Switch MSB 0 1 0 G1 G0 S2 S1 0 0 1 1 0 1 0 0 1 1 0 1 0 1 LSB S0 0 1 0 1 FUNCTION Audio Switch Stereo 1 Stereo 2 (MUTE) (*) Stereo 3 (MUTE) (*) Stereo 4 (MUTE) (*) LOUDNESS ON LOUDNESS OFF +18.75dB +12.5dB +6.25dB 0dB For example to select the stereo 1 input with a gain of +12.5dB, loudness on, the 8 bit string is: 01001000 (*) Stereo 2, 3, 4 are connected internally but not available on pins. Bass and Treble 0 0 1 1 1 1 0 1 C3 C3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 C2 C2 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 C1 C1 0 0 1 1 0 0 1 1 1 1 0 0 1 1 0 0 C0 C0 0 1 0 1 0 1 0 1 1 0 1 0 1 0 1 0 Bass Treble -14 -12 -10 -8 -6 -4 -2 0 0 2 4 6 8 10 12 14 C3 = Sign For example Bass at -10dB is obtained by the following 8 bit string: 01100010 10/12 TDA7314 mm MIN. A A1 A2 B B1 c D E E1 e e1 e2 e3 L 2.54 3.30 0.51 3.05 0.36 0.76 0.23 22.61 7.62 6.10 6.40 1.778 7.62 10.92 1.52 3.81 0.10 0.130 3.30 0.46 1.02 0.25 22.86 4.57 0.56 1.14 0.38 23.11 8.64 6.86 TYP. MAX. 5.08 0.020 0.120 0.130 0.180 MIN. inch TYP. MAX. 0.20 DIM. OUTLINE AND MECHANICAL DATA 0.0142 0.0181 0.0220 0.030 0.009 0.890 0.30 0.240 0.252 0.070 0.30 0.430 0.060 0.150 0.040 0.045 0.0098 0.0150 0.90 0.910 0.340 0.270 SDIP24 (0.300") E E1 A1 A2 Stand-off B B1 e e1 e2 c D E 24 13 F .015 0,38 Gage Plane 1 12 e3 SDIP24 L A e2 11/12 TDA7314 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics (c) 1999 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com 12/12 |
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